In recent years, a method has been developed which forms an integrated circuit using a Silicon On Insulator (SOI) substrate having thin single crystal silicon layers formed on an insulating layer instead of a bulk silicon substrate for the purpose of high-speed driving and reduction in power consumption. It has been known that, if an integrated circuit is formed using an SOI substrate, it is possible to reduce parasitic capacity.
As a method for manufacturing an SOI, for example, like a Smart-Cut (registered trademark) method disclosed in PTLs 1 and 2, a method of directly transferring single crystal silicon layers to an insulating layer using hydrogen ion injection has been generally well known.
However, since a silicon substrate (wafer) of approximately 6 to 8 inch φ is used for such a general SOI substrate, it is difficult to make a large screen. In addition, the SOI substrate itself is expensive, and thus the SOI substrate becomes an extremely expensive substrate as the area thereof increases.
Here, in recent years, as disclosed in PTLs 3 and 4, a technology has been developed which manufactures an inexpensive and large-area SOI substrate by arranging and bonding a plurality of silicon wafers on an inexpensive and large-area glass substrate, and transferring silicon thin films using the Smart-Cut method or the like.
If the silicon wafers are aligned on and bonded to the large glass substrate one by one when such a large-area SOI substrate is manufactured, it is extremely inefficient. However, in a practical manner, in order to increase manufacturing efficiency, a method has been examined which arranges the silicon wafers in line on a tray, an apparatus, or the like, and then collectively bonds them to the large glass substrate or perform a heat treatment, thereby accomplishing a large area and work efficiency.
In PTL 5, a plurality of semiconductor substrates are bonded to a single large glass substrate.
In PTL 5, the silicon substrates are arranged in substrate arrangement regions which include four depressed portions provided on the substrate support of an apparatus. Subsequently, a single large base substrate is arranged by covering the silicon substrates which are arranged in the four depressed portions provided on the substrate support. Since the base substrate is large, the base substrate is supported by convex portions in the vicinity of the four substrate arrangement regions of the substrate support in order to prevent the base substrate from bending.
In addition, the silicon substrates in the substrate arrangement regions are moved up and down by a plurality of substrates support mechanisms which are on the lower sides of the silicon substrates in the substrate arrangement regions and are arranged to penetrate the substrate support. In addition, when the silicon substrates, which are moved up and down, touch the base substrate and pressure is applied, the plurality of silicon substrates are bonded to the base substrate.
In this way, in PTL 3, the plurality of silicon substrates are bonded to the base substrate which is the single large glass substrate at one time.
As described above, since the base substrate is supported by the convex portions in the vicinity of the four substrate arrangement regions of the substrate support, the plurality of silicon substrates are separated from each other and bonded to the base substrate.
PTLs 6 and 7 disclose a method of arranging silicon substrates on a tray on which a plurality of depressed portions are formed, and then transferring silicon layers which are separated from the silicon substrates to a single base substrate.
A method for manufacturing an SOI substrate disclosed in PTLs 6 and 7 will be described with reference to FIG. 14.
FIG. 14 is a view illustrating the method for manufacturing an SOI substrate disclosed in PTLs 6 and 7.
As shown in FIG. 14(a), silicon substrates 812 are respectively arranged in a plurality of depressed portions which are formed in the tray 810 and are formed to be separated from each other.
Here, when the silicon substrates 812 are arranged in the depressed portions by a machine or the like, it is generally necessary to pick up or adsorb the side surfaces or the rear surface of each silicon substrate 812 by a jig in order to prevent a bonding surface from becoming dirty. Therefore, in order to secure clearance to let the jig out after the arrangement, the plurality of depressed portions which are formed in the tray 810 are arranged to be separated from each other.
In addition, as shown in FIG. 14(b), hydrogen ions 821 are injected into the silicon substrates 812 which are arranged in the depressed portions, damaged regions 813 (fragile layers) being formed in predetermined depths of the silicon substrates 812. In addition, as shown in FIG. 14(c), a base substrate 814 which is a common single large glass substrate is bonded to the surfaces of the silicon substrates 812 in which the damaged regions 813 are formed (surfaces opposite to a side on which the tray 810 is arranged) by applying the pressure. At this time, the base substrate 814 and the tray 810 are turned over.
In addition, semiconductor layers 815 are separated from the damaged regions 813 by performing heat treatment. Therefore, it is possible to transfer the plurality of semiconductor layers 815 to the base substrate 814.
In addition, as shown in FIG. 14(d), the surfaces of the semiconductor layers 815 are planarized by irradiating laser light to the surfaces of the semiconductor layers 815.
In this way, in PTLs 6 and 7, the plurality of semiconductor layers 815 are bonded to the single base substrate 814 at one time.
Since the silicon substrates 812 are separated from each other and arranged on the tray 810, the plurality of semiconductor layers 815 are bonded to the base substrate 814 while being separated from each other.
In addition, PTL 8 discloses a method of arranging a plurality of silicon substrates on a base substrate, covering the silicon substrates using a cover, separating the silicon substrates from damaged regions and transferring silicon layers to the base substrate.
In this manner, the silicon substrates are separated from the damaged regions after being covered using the cover. Therefore, after the silicon substrates are separated, regions on the sides of the substrates which are different from the semiconductor layers to be transferred to the base substrate are prevented from being off to the sides in the silicon substrates, and from damaging the transferred semiconductor layers.
In addition, it is necessary that the semiconductor layers, which are arranged in the base substrate, be thin films in order to acquire desired TFT characteristics (low off leakage current) or secure the coverage of an insulating film to be formed thereon. However, if the semiconductor layers, which have thin film thickness because the damaged regions 813 are shallowly formed, are directly transferred to the base substrate, holes are easily formed in the semiconductor layers, and thus yield is lowered.
Therefore, the semiconductor layers which are thicker than a desired film thickness are transferred to the base substrate in advance. In addition, as shown in FIG. 14(d), after laser light is irradiated and the surfaces of the semiconductor layers are planarized, a so-called etch-back process is performed, and thus the semiconductor layers are thinned.
In the etch-back process, a dry etching process is performed in such a way that the base substrate on which the semiconductor layers are arranged is inserted into a chamber, process gas is introduced to the chamber, and plasma is generated on the surface of the base substrate.